The different LCD controllers of the market store pixel arrays byte wise in RAM according to a horizontal or a vertical orientation called paging scheme.
The upper figure shows a horizontal paging scheme in RAM on a 128 x 128 Dot Matrix display module with Most Significant Bit (D7) last. ( Horizontal paging like the popular Toshiba T6963c )
Next figure shows a vertical paging system in RAM, with Most Significant Bit last too.
(Vertical paging like EPSON SED1565 or S1D15100 series)
The paging scheme of the target LCD controller can be configured by buttons in the files & encoder manager of Bitmap2LCD.
You can choose the corner of the LCD module where the first byte is located and the orientation of the paging scheme and toggle the Most Significant Bit first or Last option.
(big or little endianness) You can mirror the byte itself and/or the full display mapping of bytes.
At design time on the design canvas, when the desired paging scheme is selected with the direction buttons described above, you can enable the display of the paging tags : colored horizontal or vertical lines are displayed along the canvas grid lines to avoid overlapping of dynamic pictograms in the byte fields of 8 single contiguous pixels.
The areas of dynamic elements can be carefully separated in cases of any partial changes or refreshes on the display. Selections of areas within the paging scheme tags can be done to generate a partial display of (for example a displayed button or an icon) , when it is enabled (positive mode video) or disabled (negative mode video). Change of display parts will save Flash memory size in the target application and minimize LCD access time. X and Y Origin co-ordinates and size of the partial display area are optionally sent as parameters in the generated header output file. The C routine of the calling function could manage and convert if necessary the first 4 integers of the generated constant table. (Width, Height, X Position, Y Position )
